There are 16x CMUs and 4x IOUs with up to 4x DCUs in a fully configured SPARC M5-32 server. The core interconnect component is Scalability Switch Board (SSB). How many SSBs can there be in a fully configured server?
Which three statements are correct descriptions of SPARC M5-32 server design? (DCU = Domain Configuration Unit, CMU = CPU Memory Board Unit, IOU = I/O Switch Board)